Protel Design System Design Rule Check
PCB File : pmter.PCB
Date     : 30-Mar-2004
Time     : 00:19:45

Processing Rule : Short-Circuit Constraint (Allowed=Not Allowed) (On the board ),(On the board )
Rule Violations :0

Processing Rule : Broken-Net Constraint ( (On the board ) )
   Violation         Net GND   is broken into 2 sub-nets. Routed To 96.00%
     Subnet : J1-13
     Subnet : J1-25    J1-24    J1-23    J1-22    J1-21    J1-20    J1-19    J1-18    R9-1     R9-2
              U3-2     C6-2     D1-1     C9-2     U1-3     C1-2     U2-2     C7-2     C4-2     R7-1     R5-1
              C5-2     J2-2     L1-1     C8-2
Rule Violations :1

Processing Rule : Clearance Constraint (Gap=0.254mm) (On the board ),(On the board )
Rule Violations :0

Processing Rule : Hole Size Constraint (Min=0.0254mm) (Max=2.54mm) (On the board )
Rule Violations :0

Processing Rule : Width Constraint (Min=0.254mm) (Max=2.54mm) (Prefered=0.508mm) (On the board )
Rule Violations :0

Processing Rule : Width Constraint (Min=0.254mm) (Max=0.254mm) (Prefered=0.254mm) (Disabled)(On the board )
Rule Violations :0


Violations Detected : 1
Time Elapsed        : 00:00:00