Protel Design System Design Rule Check
PCB File : dc_dc_stepup.Pcb
Date     : 23-Feb-2005
Time     : 18:36:38

Processing Rule : Clearance Constraint (Gap=0.5mm) (Is a Polygon  ),(On the board )
Rule Violations :0

Processing Rule : Hole Size Constraint (Min=0.0254mm) (Max=2.54mm) (On the board )
Rule Violations :0

Processing Rule : Width Constraint (Min=0.254mm) (Max=2.54mm) (Prefered=0.508mm) (On the board )
Rule Violations :0

Processing Rule : Clearance Constraint (Gap=0.254mm) (On the board ),(On the board )
Rule Violations :0

Processing Rule : Broken-Net Constraint ( (On the board ) )
Rule Violations :0

Processing Rule : Short-Circuit Constraint (Allowed=Not Allowed) (On the board ),(On the board )
Rule Violations :0


Violations Detected : 0
Time Elapsed        : 00:00:02
